N320/N321 - Revision history

MichaelDickens: /* Schematics */

2026-06-26T20:11:54Z

‎Schematics

MichaelDickens: /* Schematics */

2026-06-26T18:39:30Z

‎Schematics

MichaelDickens: /* Schematics */ per direction from the powers that be

2026-06-25T20:58:04Z

‎Schematics: per direction from the powers that be

MichaelDickens: /* RF Specifications */ add quick info about phase coherence

2024-11-07T17:12:29Z

‎RF Specifications: add quick info about phase coherence

MichaelDickens: /* N321 */ add NOTE about phase coherence

2024-11-07T17:11:20Z

‎N321: add NOTE about phase coherence

MichaelDickens: /* N320 */ add NOTE about phase coherence

2024-11-07T17:10:59Z

‎N320: add NOTE about phase coherence

MichaelDickens: /* Rear Panel */

2024-10-04T15:53:14Z

‎Rear Panel

MichaelDickens: /* Ref Clock - 10 MHz */ remove "sinusoidal" while we determine the correct path via internal testing

2024-10-01T16:45:33Z

‎Ref Clock - 10 MHz: remove "sinusoidal" while we determine the correct path via internal testing

MichaelDickens: /* Option: USRP N320/N321 Rackmount */ add note about cooling. and ventilation

2024-09-17T19:39:36Z

‎Option: USRP N320/N321 Rackmount: add note about cooling. and ventilation

MichaelDickens: /* PPS - Pulse Per Second */ minor language fix

2024-09-17T19:37:30Z

‎PPS - Pulse Per Second: minor language fix

@@ Line 352: / Line 352: @@
 ==Schematics==
-Schematics and certain other more in-depth USRP documentation is available under non-disclosure agreement (NDA) and per specific request only. Please submit a request via the [[NI_SRM|Support Request Manager]].
+For detailed design files such as schematics and certain other more in-depth USRP documentation submit a request via the [[NI_SRM|Support Request Manager]].
 ==GPSDO==

@@ Line 352: / Line 352: @@
 ==Schematics==
-Schematics are available for legitimate reasons under NDA; please submit a request [https://www.ni.com/support via NI Support].
+Schematics and certain other more in-depth USRP documentation is available under non-disclosure agreement (NDA) and per specific request only. Please submit a request via the [[NI_SRM|Support Request Manager]].
 ==GPSDO==

@@ Line 351: / Line 351: @@
 ==Schematics==
-===N320/N321===
-* Motherboard: [[File:USRP N3XX MB Schematic.pdf]]
+Schematics are available for legitimate reasons under NDA; please submit a request [https://www.ni.com/support via NI Support].
-* Daughterboard: [[File:N32X Daughterboard Schematic.pdf]]
 ==GPSDO==

@@ Line 103: / Line 103: @@
 ** 4100 – 6000 MHz
-* External LO Frequency Range: 450 MHz - 6.0 GHz
+* External LO Frequency Range (required for phase coherence): 450 MHz - 6.0 GHz
 {| class="wikitable" style="width:80%"
@@ Line 219: / Line 219: @@
 ** 4500 – 6000 MHz
-* External LO Frequency Range: 450 MHz - 6.0 GHz
+* External LO Frequency Range (required for phase coherence): 450 MHz - 6.0 GHz
 {| class="wikitable" style="width:80%"

@@ Line 47: / Line 47: @@
 * Dual-core ARM A9 800 MHz CPU
 * 2 RX, 2 TX in half-wide RU form factor
-* 3 MHz – 6 GHz frequency range
+* 3 MHz – 6 GHz frequency range [NOTE: phase coherence requires minimum of 450 MHz RF center frequency]
 * Up to 200 MHz of instantaneous bandwidth per channel
 * Sub-octave RX, TX filter bank

@@ Line 508: / Line 508: @@
 * '''REF IN''': Reference clock input
 * '''PPS/TRIG IN''': Input port for the PPS signal
-* '''TRIG OUT''': Output port for the exported reference clock
+* '''TRIG OUT''': Output port for the exported PPS signal
 * '''PWR''': Connector for the USRP N320 Series power supply

@@ Line 608: / Line 608: @@
 ===Ref Clock - 10 MHz===
-Using an external 10 MHz reference clock, a square wave will offer the best phase noise performance, but a sinusoid is acceptable. The power level of the reference clock cannot exceed +10 dBm.
+An external 10 MHz reference clock may be used. The optimal signal is a square wave as created by the [https://kb.ettus.com/OctoClock_CDA-2990 OctoClock/CDDA-2990]. The input signal power level of the reference clock must not exceed +15 dBm.
 ===PPS - Pulse Per Second===

@@ Line 662: / Line 662: @@
 ==Option: USRP N320/N321 Rackmount==
-The USRP N320/N321 was designed to be used with a [https://www.ettus.com/all-products/n3xx-rack-mount/ 1U Rackmount Assembly] for building high-density MIMO systems in a compact and well-organized setup. This mount ''requires'' two compatible USRPs, and provides rubber standoffs between the USRPs to avoid both direct contact and surface scratching. If the user will be developing in a laboratory environment or building a high-channel count USRP system, then a 1U Rackmount Assembly is highly recommended. This specific mount is compatible with only the USRP N300, N310, N320, and N321, and allows the integration of up to eight bidirectional RF channels per 1U.
+The USRP N320/N321 was designed to be used with a [https://www.ettus.com/all-products/n3xx-rack-mount/ 1U Rackmount Assembly] for building high-density MIMO systems in a compact and well-organized setup. This mount ''requires'' two compatible USRPs, and provides rubber standoffs between the USRPs to avoid both direct contact and surface scratching. If the user will be developing in a laboratory environment or building a high-channel count USRP system, then a 1U Rackmount Assembly is highly recommended. This specific mount is compatible with only the USRP N300, N310, N320, and N321, and allows the integration of up to eight bidirectional RF channels per 1U. NOTE that this mount places the USRPs side-by-side which can increase the thermal load on one of the 2 devices. In this setup, make sure the ambient environment is well cooled and ventilated to remove excess heat.
 ==Guidance on SFP+ Adapters for Fiber Connectivity on USRP N320/N321==

@@ Line 611: / Line 611: @@
 ===PPS - Pulse Per Second===
-Using a PPS signal for timestamp synchronization requires a square wave signal with the following a 5Vpp amplitude.
 To test the PPS input, you can use the following tool from the UHD examples: