USRP X410/X440 Getting Started Guide - Revision history

MichaelDickens at 21:04, 26 June 2026

2026-06-26T21:04:09Z

FrankDietze: update mender commands

2025-07-09T09:30:09Z

update mender commands

DylanCaswell: /* eMMC Storage */

2025-03-28T13:09:46Z

‎eMMC Storage

DylanCaswell: /* eMMC Storage */

2024-11-13T19:41:44Z

‎eMMC Storage

DylanCaswell: /* eMMC Storage */

2024-11-12T13:45:20Z

‎eMMC Storage

DylanCaswell: /* GPS */

2024-11-05T20:52:59Z

‎GPS

DylanCaswell at 20:47, 5 November 2024

2024-11-05T20:47:27Z

MartinAnderseck: Changed 30dB attenuation warning from X440 to X410.

2024-08-07T13:19:38Z

Changed 30dB attenuation warning from X440 to X410.

MichaelDickens: /* FPGA Image Flavors */ whitespace

2024-01-17T17:57:38Z

‎FPGA Image Flavors: whitespace

MichaelDickens: initial creation

2023-09-22T15:34:38Z

initial creation

Show changes

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 ===User-configurable LEDs===
 The USRP X4x0's user-configurable rear panel status LEDs (LED 0, LED 1, and LED 2) allow the user to have visual indication of various device conditions. Supported LED Behaviors provides a complete list of the supported behaviors for each user-configurable LED. By default, these LEDs are configured as described in LEDs Default Behavior.
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 https://files.ettus.com/manual/page_usrp_x4xx.html
 [[Category:Getting Started Guides]]
 [[Category:X4x0]]

@@ Line 185: / Line 185: @@
 If the reboot worked, and the device seems functional, commit the changes so that the boot loader knows to permanently boot into this partition:
-     $ mender -commit
+     $ mender commit
 To identify the currently installed Mender artifact from the command line, the following file can be queried on the X4x0:
-     $ cat /etc/mender/artifact_info
+     $ mender show-artifact
 If you are using a Mender server, the updates can be initiated from a web dashboard. From there, you can start the updates without having to log into the device, and you can update groups of USRPs with a few clicks in a web GUI. The dashboard can also be used to inspect the state of USRPs. This is a simple way to update groups of rack-mounted USRPs with custom file systems.

@@ Line 74: / Line 74: @@
 The main non-volatile storage of the USRP is an eMMC:
-* USRP X410: 16 GB (Module Revision G or earlier) or 32 GB (Module Revision H and later)
+* USRP X410: 16 GB (Module Revision H or earlier) or 32 GB (Module Revision J and later)
 * USRP X440: 16 GB (Module Revision D or earlier) or 32 GB (Module Revision E and later)

@@ Line 72: / Line 72: @@
 ==eMMC Storage==
-The main non-volatile storage of the USRP is 16 GB (Module Revision G or earlier) or 32 GB (Module Revision H onwards) eMMC storage. This storage can be made accessible as a USB Mass Storage device through the USB-OTG connector on the back panel.
+The main non-volatile storage of the USRP is an eMMC:
 The entire root file system (Linux kernel, libraries) and any user data are stored on the eMMC. It is partitioned into four partitions:

@@ Line 72: / Line 72: @@
 ==eMMC Storage==
-The main non-volatile storage of the USRP is a 16 GB eMMC storage. This storage can be made accessible as a USB Mass Storage device through the USB-OTG connector on the back panel.
+The main non-volatile storage of the USRP is 16 GB (Module Revision G or earlier) or 32 GB (Module Revision H onwards) eMMC storage. This storage can be made accessible as a USB Mass Storage device through the USB-OTG connector on the back panel.
 The entire root file system (Linux kernel, libraries) and any user data are stored on the eMMC. It is partitioned into four partitions:

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 usrp->set_sync_source("clock_source=gpsdo,time_source=gpsdo");
 </pre>
 ==Front-Panel Programmable GPIOs==

@@ Line 535: / Line 535: @@
 ==GPS==
-The USRP X4x0 includes a Jackson Labs LTE-Lite GPS module. Its antenna port is on the rear panel (see Front and Back Panels). When the X4x0 has access to GPS satellite signals, it can use this module to read out the current GPS time and location as well as to discipline an onboard OCXO.
+The USRP X4x0 includes a Jackson Labs LTE-Lite GPS module. Its antenna port is on the rear panel. When the X4x0 has access to GPS satellite signals, it can use this module to read out the current GPS time and location as well as to discipline an onboard OCXO.
-To use the GPS as a clock and time reference, simply use gpsdo as a clock or time source. Alternatively, set gpsdo as a synchronization source:
+To use the GPS as a clock and time reference, set the device arguments <code>time_source</code> and <code>clock_source</code> to <code>gpsdo</code>.
 <pre>

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 |-
 |style="padding-left:10px; padding-right:10px; padding-bottom:10px;" |[[File:Caution.png|24px|center]]
-|style="padding-left:10px; padding-right:10px; padding-bottom:10px;" |X440: Always use at least 30dB attenuation if operating in loopback configuration
+|style="padding-left:10px; padding-right:10px; padding-bottom:10px;" |X410: Always use at least 30dB attenuation if operating in loopback configuration.
 |-
 |}

← Older revision		Revision as of 17:57, 17 January 2024
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	==FPGA Image Flavors==		==FPGA Image Flavors==
−	Unlike the USRP X310 or other third-generation USRP devices, the FPGA image flavors do not only encode how the QSFP28 connectors are configured, but also which master clock rates are available. This is because the data converter configuration is part of the FPGA image (the ADCs/DACs on the X4x0 are on the same die as the FPGA). The image flavors consist of two short strings, separated by an underscore, e.g. X4_200 (X410) or X4_400 (X440) is an image flavor which contains 4x 10 GbE, and can handle an analog bandwidth of 200 MHz or 400 MHz respectively. The first two characters describe the configuration of the QSFP28 ports: 'X' stands for 10 GbE, 'C' stands for 100 GbE. For details see[https://files.ettus.com/manual/page_usrp_x4xx.html#x4xx_updating_fpga_types FPGA Image Flavor] in the [https://files.ettus.com/manual USRP Hardware Driver and USRP Manual].	+	Unlike the USRP X310 or other third-generation USRP devices, the FPGA image flavors do not only encode how the QSFP28 connectors are configured, but also which master clock rates are available. This is because the data converter configuration is part of the FPGA image (the ADCs/DACs on the X4x0 are on the same die as the FPGA). The image flavors consist of two short strings, separated by an underscore, e.g. X4_200 (X410) or X4_400 (X440) is an image flavor which contains 4x 10 GbE, and can handle an analog bandwidth of 200 MHz or 400 MHz respectively. The first two characters describe the configuration of the QSFP28 ports: 'X' stands for 10 GbE, 'C' stands for 100 GbE. For details see [https://files.ettus.com/manual/page_usrp_x4xx.html#x4xx_updating_fpga_types FPGA Image Flavor] in the [https://files.ettus.com/manual USRP Hardware Driver and USRP Manual].