B100
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Revision as of 13:14, 30 April 2016 by Ettus (Talk | contribs) (Created page with "==Key Features== ===USRP B100=== *16 MHz of RF bandwidth with 8 bit samples *8 MHz of RF bandwidth with 16 bit samples *USB 2.0 high speed connectivity *Motherboard has one R...")
Key Features
USRP B100
- 16 MHz of RF bandwidth with 8 bit samples
- 8 MHz of RF bandwidth with 16 bit samples
- USB 2.0 high speed connectivity
- Motherboard has one RTX daughterboard slot (1 RX + 1 TX connectors)
- Onboard FPGA processing
- FPGA: Xilinx Spartan 3A-1400 FPGA
- ADCs: 12-bits 64 MS/s
- DACs: 14-bits 128 MS/s
- Ability to lock to external 5 or 10 MHz clock reference
- TCXO Frequency Reference (~2.5ppm)
- Flexible clocking from 10 MHz to 64 MHz
- FPGA code can be changed with Xilinx® ISE® WebPACK™ tools
