Difference between revisions of "X300/X310"

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* Updated February 18, 2014 for UHD 3.8.5
  
 
==Interfaces and Connectivity==
 
==Interfaces and Connectivity==

Revision as of 15:03, 11 April 2016

Device Overview

The Ettus Research USRP X310 is a high-performance, scalable software defined radio (SDR) platform for designing and deploying next generation wireless communications systems. The hardware architecture combines two extended-bandwidth daughterboard slots covering DC – 6 GHz with up to 120 MHz of baseband bandwidth, multiple high-speed interface options (PCIe, dual 10 GigE, dual 1 GigE), and a large user-programmable Kintex-7 FPGA in a convenient desktop or rack-mountable half-wide 1U form factor.

Key Features

X300

  • Xilinx Kintex-7 XC7K325T FPGA
  • 14 bit 200 MS/s ADC
  • 16 bit 800 MS/s DAC
  • Frequency range: DC - 6 GHz with suitable daughterboard
  • Up 120MHz bandwidth per channel
  • Two wide-bandwidth RF daughterboard slots
  • Optional GPSDO
  • Multiple high-speed interfaces (Dual 10G, PCIe Express, ExpressCard, Dual 1G

X310

  • Xilinx Kintex-7 XC7K410T FPGA
  • 14 bit 200 MS/s ADC
  • 16 bit 800 MS/s DAC
  • Frequency range: DC - 6 GHz with suitable daughterboard
  • Up 120MHz bandwidth per channel
  • Two wide-bandwidth RF daughterboard slots
  • Optional GPSDO
  • Multiple high-speed interfaces (Dual 10G, PCIe Express, ExpressCard, Dual 1G

Compatible Daughterboards

  • WBX-120 / WBX-40
  • SBX-120 / SBX-40
  • CBX-120 / CBX-40
  • UBX-160 / UBX-40
  • BasicTX / BasicRX
  • LFRX / LFTX

RF Specifications

RF Performance (with SBX-120)

  • SSB/LO Suppression -35/50 dBc
  • Phase Noise 3.5 GHz 1.0 deg RMS
  • Phase Noise 6 GHz 1.5 deg RMS
  • Power Output >10dBm
  • IIP3 (@ typ NF) 0dBm
  • Typical Noise Figure 8dB


Digital Specifications

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Physical Specifications

Dimensions

27.7 x 21.8 x 3.9 cm

Environmental Specifications

Operating Temperature Range

  • X300/X310 0-40 °C

Schematics

X300/X310

X300/X310 Schematics

Key Components

XC7K410T-2FFG900 XC7K410T-2FFG900

AD7922ARMZ

AD5623RBRMZ-3

FIN1002

24LC256T

ADS62P48IRGC

AD9146

LMK04816BISQ/NOPB_1/3

SY89547LMGTR

SN74AUP1T17

SHIELD-748871-01

NUP4302

TPS54620RGYT

LT1764EQ-3.3

TPS7A47

LTC3603EUF_TRPBF

TPS77625_SM

TPS511116

TPS79318_SM

HDR2X7-761985-01

FT223HQ

Datasheets

  • XC7K325T
  • XC7K410T

Mechanical Info

Weight

With 2x SBX-120: 1.7kg

Drawings

FPGA

Resource Type X300 - XC7K325T X310 - XC7K410T
Count Total % Utilized Count Total % Utilized
DSP48 Blocks 753 840 90% 1453 1540 94%
Block Rams (18 kB) 5 445 1% 356 795 45%
Logic Cells 125536 203800 62% 182024 254200 72%
Slices LUTS 27413 50950 54% 38801 63550 61%
  • Updated February 18, 2014 for UHD 3.8.5

Interfaces and Connectivity

Follow the links below for additional information on configuring each interface for the USRP X300 or X310 SDRs.

Downloads

FPGA Resources

UHD Stable Binaries

UHD Source Code on Github