Difference between revisions of "X300/X310"

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(Interfaces and Connectivity)
(Interfaces and Connectivity)
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==Interfaces and Connectivity==
 
==Interfaces and Connectivity==
 +
Follow the links below for additional information on configuring each interface for the USRP X300 or X310 SDRs.
 +
 
*[http://files.ettus.com/manual/page_usrp_x3x0.html#x3x0_hw_10gige Dual 10 Gigabit Ethernet] - 200 MS/s Full Duplex @ 16-bit
 
*[http://files.ettus.com/manual/page_usrp_x3x0.html#x3x0_hw_10gige Dual 10 Gigabit Ethernet] - 200 MS/s Full Duplex @ 16-bit
 
*[http://files.ettus.com/manual/page_usrp_x3x0.html#x3x0_hw_pcie PCIe Express (Desktop)] - 200 MS/s Full Duplex @ 16-bit
 
*[http://files.ettus.com/manual/page_usrp_x3x0.html#x3x0_hw_pcie PCIe Express (Desktop)] - 200 MS/s Full Duplex @ 16-bit

Revision as of 13:18, 17 March 2016

Device Overview

The Ettus Research USRP X310 is a high-performance, scalable software defined radio (SDR) platform for designing and deploying next generation wireless communications systems. The hardware architecture combines two extended-bandwidth daughterboard slots covering DC – 6 GHz with up to 120 MHz of baseband bandwidth, multiple high-speed interface options (PCIe, dual 10 GigE, dual 1 GigE), and a large user-programmable Kintex-7 FPGA in a convenient desktop or rack-mountable half-wide 1U form factor.

Key Features

X300

  • Xilinx Kintex-7 XC7K325T FPGA
  • 14 bit 200 MS/s ADC
  • 16 bit 800 MS/s DAC
  • Frequency range: DC - 6 GHz with suitable daughterboard
  • Up 120MHz bandwidth per channel
  • Two wide-bandwidth RF daughterboard slots
  • Optional GPSDO
  • Multiple high-speed interfaces (Dual 10G, PCIe Express, ExpressCard, Dual 1G

X310

  • Xilinx Kintex-7 XC7K410T FPGA
  • 14 bit 200 MS/s ADC
  • 16 bit 800 MS/s DAC
  • Frequency range: DC - 6 GHz with suitable daughterboard
  • Up 120MHz bandwidth per channel
  • Two wide-bandwidth RF daughterboard slots
  • Optional GPSDO
  • Multiple high-speed interfaces (Dual 10G, PCIe Express, ExpressCard, Dual 1G


Block Diagram

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RF Specifications

RF Performance (with SBX-120)

  • SSB/LO Suppression -35/50 dBc
  • Phase Noise 3.5 GHz 1.0 deg RMS
  • Phase Noise 6 GHz 1.5 deg RMS
  • Power Output >10dBm
  • IIP3 (@ typ NF) 0dBm
  • Typical Noise Figure 8dB


Digital Specifications

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Physical Specifications

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Environmental Specifications

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Schematics

X300/X310

X300/X310 Schematics

Key Components

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Datasheets

Mechanical Info (size, weight, drawings)

Dimensions

27.7 x 21.8 x 3.9 cm

Weight

With 2x SBX-120: 1.7kg

FPGA (MB only)

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Interfaces and Connectivity

Follow the links below for additional information on configuring each interface for the USRP X300 or X310 SDRs.

Environmental

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Downloads

FPGA Resources

UHD Stable Binaries

UHD Source Code on Github