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Revision as of 14:23, 27 April 2016

Device Overview

The USRP Bus Series provides a fully integrated, single board, Universal Software Radio Peripheral platform with continuous frequency coverage from 70 MHz – 6 GHz. Designed for low-cost experimentation, it combines a fully integrated direct conversion transceiver providing up to 56MHz of real-time bandwidth, an open and reprogrammable Spartan6 FPGA, and fast and convenient bus-powered SuperSpeed USB 3.0 connectivity.

Key Features

B200

  • Xilinx Spartan 6 XC6SLX75 FPGA
  • Analog Devices AD9364 RFIC direct-conversion transceiver
  • Frequency range: 70 MHz - 6 GHz
  • Up to 56 MHz of instantaneous bandwidth
  • Full duplex, SISO (1 Tx & 1 Rx)
  • Fast and convenient bus-powered USB 3.0 connectivity
  • Optional Board Mounted GPSDO

B210

  • Xilinx Spartan 6 XC6SLX150 FPGA
  • Analog Devices AD9361 RFIC direct-conversion transceiver
  • Frequency range: 70 MHz - 6 GHz
  • Up to 56 MHz of instantaneous bandwidth (61.44MS/s quadrature)
  • Full duplex, MIMO (2 Tx & 2 Rx)
  • Fast and convenient bus-powered USB 3.0 connectivity
  • Optional Board Mounted GPSDO

B200mini

  • Xilinx Spartan-6 XC6SLX75 FPGA
  • Analog Devices AD9364 RFIC direct-conversion transceiver
  • Frequency range: 70 MHz - 6 GHz
  • Up to 56 MHz of instantaneous bandwidth
  • Full duplex, SISO (1 Tx & 1 Rx)
  • Fast and convenient bus-powered USB 3.0 connectivity

B200mini-i

  • Industrial-grade Xilinx Spartan-6 XC6SLX75 FPGA
  • Analog Devices AD9364 RFIC direct-conversion transceiver
  • Frequency range: 70 MHz - 6 GHz
  • Up to 56 MHz of instantaneous bandwidth
  • Full duplex, SISO (1 Tx & 1 Rx)
  • Fast and convenient bus-powered USB 3.0 connectivity

B205mini-i

  • Industrial-grade Xilinx Spartan-6 XC6SLX150 FPGA
  • Analog Devices AD9364 RFIC direct-conversion transceiver
  • Frequency range: 70 MHz - 6 GHz
  • Up to 56 MHz of instantaneous bandwidth
  • Full duplex, SISO (1 Tx & 1 Rx)
  • Fast and convenient bus-powered USB 3.0 connectivity

RF Specifications

RF Performance

  • SSB/LO Suppression -35/50 dBc
  • Phase Noise 3.5 GHz 1.0 deg RMS
  • Phase Noise 6 GHz 1.5 deg RMS
  • Power Output >10dBm
  • IIP3 (@ typ NF) -20dBm
  • Typical Noise Figure <8dB

Physical Specifications

Dimensions

  • B200mini/B205mini 5.0 x 8.4 cm
  • B200/B210 9.7 x 15.5 x 1.5 cm

Environmental Specifications

Operating Temperature Range

  • B200mini 0-40 °C
  • B200mini-i 0-45 °C
  • B205mini-i 0-45 °C
  • B200 0-40 °C
  • B210 0-40 °C

Schematics

B200mini

B200mini Schematics

B210

B210 Schematics

Datasheets

Mechanical Info

Weight

  • B200mini 24.0 g
  • B200/B210 350 g

Drawings

Enclosures

  • Full Steel Enclosure
  • Compatible with green USRP B200 and B210 devices (revision 6 or later)
  • Front and rear K-Slots for anti-theft protection

USRP B Series Enclosure

FPGA

  • Utilization statistics are subject to change between UHD releases, current as of UHD 3.9.3

B200mini

Slice Logic Utilization
Used Total Percent
Number of Slice Registers 15949 93296 17%
Number of Slice LUTs 19963 46648 42%
Number used as Logic 16140 46648 34%
Number used as Memory 3823 11072 34%
Number used as RAM 972
Number used as SRL 2851
Slice Logic Distribution
Used Total Percent
Number with an unused Flip Flop 7910 23859 33%
Number with an unused LUT 3896 23859 16%
Number of fully used LUT-FF pairs 12053 23859 50%
Number of LUT Flip Flop pairs used 23859
Number of unique control sets 429
IO Utilization
Used Total Percent
Number of bonded IOBs 114 328 34%
IOB Flip Flops/Latches 147
Number of IOs 123
Specific Feature Utilization
Used Total Percent
Number of Block RAM/FIFO 110 172 63%
Number of BUFG/BUFGCTRLs 6 16 37%
Number of DSP48A1s 76 132 57%
Number of PLL_ADVs 1 6 16%
Number using Block RAM only 110

B200

Slice Logic Utilization
Used Total Percent
Number of Slice Registers 15781 93296 16%
Number of Slice LUTs 19987 46648 42%
Number used as Logic 15983 46648 34%
Number used as Memory 4004 11072 36%
Number used as RAM 972
Number used as SRL 3032
Slice Logic Distribution
Used Total Percent
Number with an unused Flip Flop 8281 24062 34%
Number with an unused LUT 4075 24062 16%
Number of fully used LUT-FF pairs 11706 24062 48%
Number of LUT Flip Flop pairs used 24062
Number of unique control sets 434
IO Utilization
Used Total Percent
Number of bonded IOBs 155 280 55%
IOB Flip Flops/Latches 124
Number of IOs 172
Specific Feature Utilization
Used Total Percent
Number of Block RAM/FIFO 144 172 83%
Number of BUFG/BUFGCTRLs 3 16 25%
Number of DSP48A1s 76 132 57%
Number using Block RAM only 144

B210

Slice Logic Utilization
Used Total Percent
Number of Slice Registers 29310 184304 15%
Number of Slice LUTs 36486 92152 39%
Number used as Logic 29279 92152 31%
Number used as Memory 7207 21680 33%
Number used as RAM 1752
Number used as SRL 5455
Slice Logic Distribution
Used Total Percent
Number with an unused Flip Flop 14325 43635 32%
Number with an unused LUT 7149 43635 16%
Number of fully used LUT-FF pairs 22161 43635 50%
Number of LUT Flip Flop pairs used 43635
Number of unique control sets 723
IO Utilization
Used Total Percent
Number of bonded IOBs 163 338 48%
IOB Flip Flops/Latches 148
Number of IOs 180
Specific Feature Utilization
Used Total Percent
Number of Block RAM/FIFO 186 268 69%
Number of BUFG/BUFGCTRLs 4 16 25%
Number of DSP48A1s 152 180 84%
Number using Block RAM only 186

Interfaces and Connectivity

B200/B210/B200mini - USB 3.0

Certifications

RoHS

As of December 1st, 2010 all Ettus Research products are RoHS compliant unless otherwise noted. More information can be found at http://ettus.com/legal/rohs-information

Downloads

FPGA Resources

UHD Stable Binaries

UHD Source Code on Github

Application Notes

FAQ

This is a list of frequently asked questions on the USRP B200/B210/B200mini. If you have questions that are not answered in this document, please contact us - info@ettus.com.

Will the USRP B200/B210 work with USB 2.0?

Yes, both the USRP B200 and USRP B210 will fall back to the USB 2.0 standard if a USB 3.0 port is not available. There are several things to consider. First, the USB 2.0 data rates are slower. Depending on the USB controller, operating system, and other factors, you may achieve a sample rate up to 8 MS/s with USB 2.0. Also, you may not be able to bus-power the USRP B200/B210 in USB 2.0 mode.


What samples rates should I expect with USB 3.0? USB 2.0?

USB 3.0 is a new standard, and there seems to be wide variation in throughput across various USB 3.0 controllers. Ettus Research maintains a list of benchmarks for various operating systems and USB 3.0 controllers.


When can I power the USRP B200/B210/B200mini off the USB bus?

The experience may vary across various controllers. Generally speaking, bus-power is ideal for SISO operation. If you are using both channels of a USRP B210 we recommend an external power supply. We provide a power supply with the USRP B210.

MIMO operation with the USRP B210 is not recommended when using the USRP B210 on bus-power.

You should not attempt to run the device on bus-power if a GPS-disciplined oscillator is installed.


How much power does the USRP consume?

The table below shows power consumption (Watts) of a USRP B210 run with a 6V power supply. Figures on a 5V supply (USB power), or with a USRP B200 will be moderately lower. The sample rates shown are aggregate sample rates on the USB 3.0 interface.

5 Msps 15.36 Msps 30.72 Msps 56 Msps 61.44 Msps
1 RX 1.92 2.112 2.184 2.508
2 RX 2.148 2.436 2.508 2.64
1 TX 2.184 2.34 2.352 2.22
2 TX 2.76 2.88 2.904 2.64
Full Duplex (1x1) 2.508 2.736 2.796 3.168
2x2 MIMO 3.252 3.588 3.672 4.11 4.092


Can I build a multi-unit system with the USRP B200/B210?

It is possible to synchronize multiple USRP B200/B210 devices using the 10 MHz/1 PPS inputs and an external distribution system like to the OctoClock-G. However, USB 3.0/2.0 performance varies dramatically when multiple devices are streaming through the same controller. Generally, we recommend using the USRP N200/N210 if you need to build a high-channel count system.


Can I access the source code for the USRP B200/B210?

Yes. The USRP B200/B210 is supported by the USRP Hardware DriverTM software. You can find the driver and FPGA source code for the USRP B200/B210, and all other USRP models, in the UHD git repository:

http://files.ettus.com/manual/page_build_guide.html


What operating systems does the USRP B200/B210 work on?

The USRP B200/B210 is supported on Linux, MAC and Windows.


Does the USRP B200/B210 work with GNU Radio?

Yes. The USRP B200/B210 work with our GNU Radio plugin - gr-uhd.


Does the USRP B200/B210 work with MATLAB and Simulink?

Yes. You need to install the Communications System Toolbox Support Package for USRP Radio.


Does the USRP B200/B210 work with OpenBTS?

Yes. This is a third-party application and you can find instructions here: OpenBTS - Build, Install, Run.

For support, please sign up and contact the OpenBTS mailing list.


What tools do I need to program the FPGA?

The USRP B200 and USRP B210 include a Spartan 6 XC6SLX75 and XC6S150, respectively. The USRP B200 can be programmed with the free version of Xilinx tools, while the larger FPGA on the USRP B210 requires a licensed seat.


Can I use a GPSDO with the USRP B200/B210?

Ettus Research offers a Board-Mounted GPS-Disciplined OCXO and a Board-Mounted GPS-Disciplined TCXO, which are compatible with the USRP B200/B210. These provide a high-accuracy XO, which can be disciplined to the global GPS standard. Please note: When the GPSDO OCXO model is integrated on the USRP B200/B210, the device should be powered with an external supply instead of USB bus power. The TCXO version can be USB bus powered.

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