Difference between revisions of "N200/N210"

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(refactor Product Pages to "Product Resource Pages")
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== Device Overview ==
 
== Device Overview ==
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The USRP Network Series offers high-bandwidth, high-dynamic range processing capability. The Gigabit Ethernet interface of the USRP Network Series allows high-speed streaming capability up to 50 MS/s in both directions (8-bit samples). These features, combined with plug-and-play MIMO capability make the USRP Network an ideal candidate for software defined radio systems with demanding performance requirements.
  
 
== Key Features==
 
== Key Features==
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===N200===
 +
<ul>
 +
<li>Xilinx® Spartan® 3A-DSP 1800 FPGA</li>
 +
<li>14 bit 100 MS/s dual ADC</li>
 +
<li>16 bit 400 MS/s dual DAC</li>
 +
<li>Frequency range: DC - 6 GHz with suitable daughterboard</li>
 +
<li>Up to 50 MS/s in both directions</li>
 +
<li>Full duplex, SISO (1 Tx & 1 Rx)</li>
 +
<li>MIMO Capable</li>
 +
<li>Optional GPSDO
 +
<li>Gigabit Ethernet connectivity</li>
 +
</ul>
 +
 
 +
 
 +
===N210===
 +
<ul>
 +
<li>Xilinx® Spartan® 3A-DSP 3400 FPGA</li>
 +
<li>14 bit 100 MS/s dual ADC</li>
 +
<li>16 bit 400 MS/s dual DAC</li>
 +
<li>Frequency range: DC - 6 GHz with suitable daughterboard</li>
 +
<li>Up to 50 MS/s in both directions</li>
 +
<li>Full duplex, SISO (1 Tx & 1 Rx)</li>
 +
<li>MIMO Capable</li>
 +
<li>Optional GPSDO
 +
<li>Gigabit Ethernet connectivity</li>
 +
</ul>
 +
 
  
 
== Block Diagram==
 
== Block Diagram==
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==Mechanical Info (size, weight, drawings)==
 
==Mechanical Info (size, weight, drawings)==
 
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==Enclosures (B-series only)==
 
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==FPGA (MB only)==
 
==FPGA (MB only)==
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==Interfaces and Connectivity==
 
==Interfaces and Connectivity==
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===N200/N210===
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* Gigabit Ethernet
  
 
==Environmental==
 
==Environmental==
 
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==Firmware (OctoClock only)==
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==Downloads (FPGA images, E310 images, etc.)==
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[http://files.ettus.com/manual/md_fpga.html FPGA Resources]
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==Performance Data (DB only)==
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[http://files.ettus.com/binaries/uhd_stable/ UHD Stable Binaries]
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 +
[https://github.com/EttusResearch/uhd UHD Source Code on Github]
  
==Downloads (FPGA images, E310 images, etc.)==
 
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[[Category:Product Resource Pages]]
 
[[Category:Product Resource Pages]]

Revision as of 15:20, 9 March 2016

Device Overview

The USRP Network Series offers high-bandwidth, high-dynamic range processing capability. The Gigabit Ethernet interface of the USRP Network Series allows high-speed streaming capability up to 50 MS/s in both directions (8-bit samples). These features, combined with plug-and-play MIMO capability make the USRP Network an ideal candidate for software defined radio systems with demanding performance requirements.

Key Features

N200

  • Xilinx® Spartan® 3A-DSP 1800 FPGA
  • 14 bit 100 MS/s dual ADC
  • 16 bit 400 MS/s dual DAC
  • Frequency range: DC - 6 GHz with suitable daughterboard
  • Up to 50 MS/s in both directions
  • Full duplex, SISO (1 Tx & 1 Rx)
  • MIMO Capable
  • Optional GPSDO
  • Gigabit Ethernet connectivity


N210

  • Xilinx® Spartan® 3A-DSP 3400 FPGA
  • 14 bit 100 MS/s dual ADC
  • 16 bit 400 MS/s dual DAC
  • Frequency range: DC - 6 GHz with suitable daughterboard
  • Up to 50 MS/s in both directions
  • Full duplex, SISO (1 Tx & 1 Rx)
  • MIMO Capable
  • Optional GPSDO
  • Gigabit Ethernet connectivity


Block Diagram

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RF Specifications

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Digital Specifications

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Physical Specifications

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Environmental Specifications

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Schematics

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Key Components

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Datasheets

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Mechanical Info (size, weight, drawings)

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FPGA (MB only)

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Interfaces and Connectivity

N200/N210

  • Gigabit Ethernet

Environmental

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Downloads (FPGA images, E310 images, etc.)

FPGA Resources

UHD Stable Binaries

UHD Source Code on Github