Difference between revisions of "RFNoC (UHD 3.0)"

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==Overview==
 
==Overview==
 
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|style="vertical-align:top; width: 60%;"|Current FPGAs, like the Xilinx Kintex-7 and Zynq-7000 series used in third generation USRP SDRs, have incredible computational capability, but taking advantage of that capability can be difficult when using traditional FPGA design flows. RFNoC is designed to allow you to efficiently harness the full power of the latest generations of FPGAs without being an expert firmware developer. It provides the capability to create FPGA applications as easily as you can create GNU Radio flowgraphs. This includes the ability to seamlessly transfer data to & from an FPGA, from the host PC in your application, dramatically improving the ease of FPGA off-loading. Having a system-level view of the entire SDR application running on both the FPGA and the host PC enables far superior development and debugging. Mixing and matching host-based and FPGA-based processing is transparent to you, and that processing can scale across multiple FPGAs and devices across a network.
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|style="vertical-align:top; width: 60%;"|RFNoC is a network-distributed heterogeneous processing tool with a focus on enabling FPGA processing in USRP devices. It allows you to move data on and off of an FPGA in a transparent way, thus enabling seamless use of both host-based and FPGA-based processing in an application. The result is a much simpler way to leverage FPGA processing capabilities and IP in your application which can scale across multiple FPGAs and devices across a network.
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Signal processing algorithms are contained modules known as "Computation Engines" or "NoC Blocks", and an interface wrapper is provided to encapsulate existing or external IP to use with RFNoC. This allows you to import Xilinx™ CoreGen™ IP blocks, for example, and use them immediately in your RFNoC application. The internals of a NoC block are wholly independent from any other block, and can be designed with any tool that supports AXI stream interfaces, including VHDL, Verilog, and Xilinx™ Vivado™ HLS.
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We are quickly building out the library of ready-to-use NoC blocks and already have many available, including the blocks necessary for an OFDM stack (e.g., detection, synchronization, equalizer, packet demodulator).
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RFNoC is integrated with the UHD™ software, and all USRP devices from the third-generation on (X300 Series, E300 Series) are supported by RFNoC out-of-the-box. Like UHD, RFNoC is also Free and Open Source Software, and the full source code can be found in our public code repositories.
 
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Revision as of 11:37, 28 December 2016

Overview

RFNoC is a network-distributed heterogeneous processing tool with a focus on enabling FPGA processing in USRP devices. It allows you to move data on and off of an FPGA in a transparent way, thus enabling seamless use of both host-based and FPGA-based processing in an application. The result is a much simpler way to leverage FPGA processing capabilities and IP in your application which can scale across multiple FPGAs and devices across a network.

Signal processing algorithms are contained modules known as "Computation Engines" or "NoC Blocks", and an interface wrapper is provided to encapsulate existing or external IP to use with RFNoC. This allows you to import Xilinx™ CoreGen™ IP blocks, for example, and use them immediately in your RFNoC application. The internals of a NoC block are wholly independent from any other block, and can be designed with any tool that supports AXI stream interfaces, including VHDL, Verilog, and Xilinx™ Vivado™ HLS.

We are quickly building out the library of ready-to-use NoC blocks and already have many available, including the blocks necessary for an OFDM stack (e.g., detection, synchronization, equalizer, packet demodulator).

RFNoC is integrated with the UHD™ software, and all USRP devices from the third-generation on (X300 Series, E300 Series) are supported by RFNoC out-of-the-box. Like UHD, RFNoC is also Free and Open Source Software, and the full source code can be found in our public code repositories.

rfnoc.png

Supported Devices

  • E310/E312
  • X300/X310

Sample of Available Blocks

  • FIFO
  • FFT
  • FIR
  • fosphor (real-time spectrum analyzer)
  • Decimator (Keep 1 in N)
  • Log Power Calculator
  • Radio Interface
  • Vector IIR (moving average)
  • Window multiplier (for FFT)
  • OFDM: Burst detection + synchronization, equalizer, packet demodulator
  • and more...

RFNoC Resources

2016

2015

2013

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