Difference between revisions of "X300/X310"
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== Device Overview == | == Device Overview == | ||
| − | + | he Ettus Research USRP X310 is a high-performance, scalable software defined radio (SDR) platform for designing and deploying next generation wireless communications systems. The hardware architecture combines two extended-bandwidth daughterboard slots covering DC – 6 GHz with up to 120 MHz of baseband bandwidth, multiple high-speed interface options (PCIe, dual 10 GigE, dual 1 GigE), and a large user-programmable Kintex-7 FPGA in a convenient desktop or rack-mountable half-wide 1U form factor. | |
| + | |||
== Key Features== | == Key Features== | ||
| − | + | ===X300=== | |
| + | <ul> | ||
| + | <li>Xilinx Kintex-7 XC7K325T FPGA</li> | ||
| + | <li>14 bit 200 MS/s ADC</li> | ||
| + | <li>16 bit 800 MS/s DAC</li> | ||
| + | <li>Frequency range: DC - 6 GHz with suitable daughterboard</li> | ||
| + | <li>Up 120MHz bandwidth per channel</li> | ||
| + | <li>Two wide-bandwidth RF daughterboard slots</li> | ||
| + | <li>Optional GPSDO</li> | ||
| + | <li>Multiple high-speed interfaces (Dual 10G, PCIe Express, ExpressCard, Dual 1G</li> | ||
| + | </ul> | ||
| + | |||
| + | ===X310=== | ||
| + | <ul> | ||
| + | <li>Xilinx Kintex-7 XC7K410T FPGA</li> | ||
| + | <li>14 bit 200 MS/s ADC</li> | ||
| + | <li>16 bit 800 MS/s DAC</li> | ||
| + | <li>Frequency range: DC - 6 GHz with suitable daughterboard</li> | ||
| + | <li>Up 120MHz bandwidth per channel</li> | ||
| + | <li>Two wide-bandwidth RF daughterboard slots</li> | ||
| + | <li>Optional GPSDO</li> | ||
| + | <li>Multiple high-speed interfaces (Dual 10G, PCIe Express, ExpressCard, Dual 1G</li> | ||
| + | </ul> | ||
| + | |||
| + | |||
== Block Diagram== | == Block Diagram== | ||
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==RF Specifications== | ==RF Specifications== | ||
| − | + | ===RF Performance (with SBX-120)=== | |
| + | * SSB/LO Suppression -35/50 dBc | ||
| + | * Phase Noise 3.5 GHz 1.0 deg RMS | ||
| + | * Phase Noise 6 GHz 1.5 deg RMS | ||
| + | * Power Output >10dBm | ||
| + | * IIP3 (@ typ NF) 0dBm | ||
| + | * Typical Noise Figure 8dB | ||
| + | |||
==Digital Specifications== | ==Digital Specifications== | ||
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==Physical Specifications== | ==Physical Specifications== | ||
| − | + | ===Dimensions=== | |
| + | 27.7 x 21.8 x 3.9 cm | ||
| + | Weight (w/ 2x SBX-120): 1.7kg | ||
==Environmental Specifications== | ==Environmental Specifications== | ||
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==Datasheets== | ==Datasheets== | ||
| − | + | * XC7K325T | |
| + | * XC7K410T | ||
==Mechanical Info (size, weight, drawings)== | ==Mechanical Info (size, weight, drawings)== | ||
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==FPGA (MB only)== | ==FPGA (MB only)== | ||
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==Interfaces and Connectivity== | ==Interfaces and Connectivity== | ||
| − | + | *Dual 10 Gigabit Ethernet - 200 MS/s Full Duplex | |
| + | *PCIe Express (Desktop) - 200 MS/s Full Duplex | ||
| + | *ExpressCard (Laptop) - 50 MS/s Full Duplex | ||
| + | *Dual 1 Gigabit Ethernet - 25 MS/s Full Duplex | ||
==Environmental== | ==Environmental== | ||
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| − | == | + | ==Downloads== |
| − | + | [http://files.ettus.com/manual/md_fpga.html FPGA Resources] | |
| − | + | ||
| − | + | [http://files.ettus.com/binaries/uhd_stable/ UHD Stable Binaries] | |
| − | + | ||
| + | [https://github.com/EttusResearch/uhd UHD Source Code on Github] | ||
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[[Category:Product Resource Pages]] | [[Category:Product Resource Pages]] | ||
Revision as of 15:55, 9 March 2016
Contents
- 1 Device Overview
- 2 Key Features
- 3 Block Diagram
- 4 RF Specifications
- 5 Digital Specifications
- 6 Physical Specifications
- 7 Environmental Specifications
- 8 Schematics
- 9 Key Components
- 10 Datasheets
- 11 Mechanical Info (size, weight, drawings)
- 12 FPGA (MB only)
- 13 Interfaces and Connectivity
- 14 Environmental
- 15 Downloads
Device Overview
he Ettus Research USRP X310 is a high-performance, scalable software defined radio (SDR) platform for designing and deploying next generation wireless communications systems. The hardware architecture combines two extended-bandwidth daughterboard slots covering DC – 6 GHz with up to 120 MHz of baseband bandwidth, multiple high-speed interface options (PCIe, dual 10 GigE, dual 1 GigE), and a large user-programmable Kintex-7 FPGA in a convenient desktop or rack-mountable half-wide 1U form factor.
Key Features
X300
- Xilinx Kintex-7 XC7K325T FPGA
- 14 bit 200 MS/s ADC
- 16 bit 800 MS/s DAC
- Frequency range: DC - 6 GHz with suitable daughterboard
- Up 120MHz bandwidth per channel
- Two wide-bandwidth RF daughterboard slots
- Optional GPSDO
- Multiple high-speed interfaces (Dual 10G, PCIe Express, ExpressCard, Dual 1G
X310
- Xilinx Kintex-7 XC7K410T FPGA
- 14 bit 200 MS/s ADC
- 16 bit 800 MS/s DAC
- Frequency range: DC - 6 GHz with suitable daughterboard
- Up 120MHz bandwidth per channel
- Two wide-bandwidth RF daughterboard slots
- Optional GPSDO
- Multiple high-speed interfaces (Dual 10G, PCIe Express, ExpressCard, Dual 1G
Block Diagram
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RF Specifications
RF Performance (with SBX-120)
- SSB/LO Suppression -35/50 dBc
- Phase Noise 3.5 GHz 1.0 deg RMS
- Phase Noise 6 GHz 1.5 deg RMS
- Power Output >10dBm
- IIP3 (@ typ NF) 0dBm
- Typical Noise Figure 8dB
Digital Specifications
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Physical Specifications
Dimensions
27.7 x 21.8 x 3.9 cm Weight (w/ 2x SBX-120): 1.7kg
Environmental Specifications
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Schematics
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Key Components
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Datasheets
- XC7K325T
- XC7K410T
Mechanical Info (size, weight, drawings)
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FPGA (MB only)
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Interfaces and Connectivity
- Dual 10 Gigabit Ethernet - 200 MS/s Full Duplex
- PCIe Express (Desktop) - 200 MS/s Full Duplex
- ExpressCard (Laptop) - 50 MS/s Full Duplex
- Dual 1 Gigabit Ethernet - 25 MS/s Full Duplex
Environmental
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