Difference between revisions of "B200/B210/B200mini/B205mini"

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Revision as of 13:05, 6 April 2016

Device Overview

The USRP Bus Series provides a fully integrated, single board, Universal Software Radio Peripheral platform with continuous frequency coverage from 70 MHz – 6 GHz. Designed for low-cost experimentation, it combines a fully integrated direct conversion transceiver providing up to 56MHz of real-time bandwidth, an open and reprogrammable Spartan6 FPGA, and fast and convenient bus-powered SuperSpeed USB 3.0 connectivity.

Key Features

USRP B200mini-i

  • Industrial-grade Xilinx Spartan-6 XC6SLX75 FPGA
  • Analog Devices AD9364 RFIC direct-conversion transceiver
  • Frequency range: 70 MHz - 6 GHz
  • Up to 56 MHz of instantaneous bandwidth
  • Full duplex, SISO (1 Tx & 1 Rx)
  • Fast and convenient bus-powered USB 3.0 connectivity

USRP B200mini

  • Xilinx Spartan-6 XC6SLX75 FPGA
  • Analog Devices AD9364 RFIC direct-conversion transceiver
  • Frequency range: 70 MHz - 6 GHz
  • Up to 56 MHz of instantaneous bandwidth
  • Full duplex, SISO (1 Tx & 1 Rx)
  • Fast and convenient bus-powered USB 3.0 connectivity

USRP B200

  • Xilinx Spartan 6 XC6SLX75 FPGA
  • Analog Devices AD9364 RFIC direct-conversion transceiver
  • Frequency range: 70 MHz - 6 GHz
  • Up to 56 MHz of instantaneous bandwidth
  • Full duplex, SISO (1 Tx & 1 Rx)
  • Fast and convenient bus-powered USB 3.0 connectivity
  • Optional Board Mounted GPSDO (TCXO)

USRP B210

  • Xilinx Spartan 6 XC6SLX150 FPGA
  • Analog Devices AD9361 RFIC direct-conversion transceiver
  • Frequency range: 70 MHz - 6 GHz
  • Up to 56 MHz of instantaneous bandwidth (61.44MS/s quadrature)
  • Full duplex, MIMO (2 Tx & 2 Rx)
  • Fast and convenient bus-powered USB 3.0 connectivity
  • Optional Board Mounted GPSDO (TCXO)

RF Specifications

RF Performance

  • SSB/LO Suppression -35/50 dBc
  • Phase Noise 3.5 GHz 1.0 deg RMS
  • Phase Noise 6 GHz 1.5 deg RMS
  • Power Output >10dBm
  • IIP3 (@ typ NF) -20dBm
  • Typical Noise Figure <8dB

Digital Specifications

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Physical Specifications

Dimensions

  • B200mini 5.0 x 8.4 cm
  • B200/B210 9.7 x 15.5 x 1.5 cm

Environmental Specifications

Operating Temperature Range

  • B200mini 0-40 °C
  • B200mini-i 0-45 °C
  • B200 0-40 °C
  • B210 0-40 °C

Schematics

B200mini

B200mini Schematics

B210

B210 Schematics

Key Components

AD9364

Analog Devices AD9364

AD9361

Analog Devices AD9361

Spartan-6

Xilinx Spartan-6 Product Page

B200mini VXTCXO

M9107 GPSDO

ADF4001 Frequency Synthesizer

XC6SLX75 / XC6SLX150

CYUSB3014

SKY13317

BD3150L50100A00

PGA−102+

Datasheets

B200mini-i/B200mini

B200/B210

Mechanical Info

Weight

  • B200mini 24.0 g
  • B200/B210 350 g

Drawings

Enclosures (B-series only)

  • Full Steel Enclosure
  • Compatible with green USRP B200 and B210 devices (revision 6 or later)
  • Front and rear K-Slots for anti-theft protection

USRP B Series Enclosure

FPGA

B200

Slice Logic Utilization
Used Total Percent
Number of Slice Registers 12007 93296 12%
Number of Slice LUTs 17149 46648 36%
Number used as Logic 14889 46648 31%
Number used as Memory 2260 11072 20%
Number used as RAM 336
Number used as SRL 1924
Slice Logic Distribution
Used Total Percent
Number with an unused Flip Flop 8325 20332 40%
Number with an unused LUT 3183 20332 15%
Number of fully used LUT-FF pairs 8824 20332 43%
Number of LUT Flip Flop pairs used 20332
Number of unique control sets 301
IO Utilization
Used Total Percent
Number of bonded IOBs 156 280 55%
IOB Flip Flops/Latches 138
Number of IOs 172
Specific Feature Utilization
Used Total Percent
Number of Block RAM/FIFO 144 172 83%
Number of BUFG/BUFGCTRLs 5 16 31%
Number of DSP48A1s 16 132 12%
Number using Block RAM only 144

B210

Slice Logic Utilization
Used Total Percent
Number of Slice Registers 21608 184304 11%
Number of Slice LUTs 30782 92152 33%
Number used as Logic 27069 92152 29%
Number used as Memory 3713 21680 17%
Number used as RAM 480
Number used as SRL 3233
Slice Logic Distribution
Used Total Percent
Number with an unused Flip Flop 15225 36833 41%
Number with an unused LUT 6051 36833 16%
Number of fully used LUT-FF pairs 15557 36833 42%
Number of LUT Flip Flop pairs used 36833
Number of unique control sets 461
IO Utilization
Used Total Percent
Number of bonded IOBs 156 338 46%
IOB Flip Flops/Latches 154
Number of IOs 172
Specific Feature Utilization
Used Total Percent
Number of Block RAM/FIFO 186 268 69%
Number of BUFG/BUFGCTRLs 5 16 31%
Number of DSP48A1s 32 180 17%
Number using Block RAM only 186

Interfaces and Connectivity

B200/B210/B200mini - USB 3.0

Downloads

FPGA Resources

UHD Stable Binaries

UHD Source Code on Github

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