N200/N210

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Device Overview

The USRP Network Series offers high-bandwidth, high-dynamic range processing capability. The Gigabit Ethernet interface of the USRP Network Series allows high-speed streaming capability up to 50 MS/s in both directions (8-bit samples). These features, combined with plug-and-play MIMO capability make the USRP Network an ideal candidate for software defined radio systems with demanding performance requirements.

Key Features

N200

  • Xilinx® Spartan® 3A-DSP 1800 FPGA
  • 14 bit 100 MS/s dual ADC
  • 16 bit 400 MS/s dual DAC
  • Frequency range: DC - 6 GHz with suitable daughterboard
  • Up to 50 MS/s in both directions
  • Full duplex, SISO (1 Tx & 1 Rx)
  • Fully-Coherent MIMO Capability
  • Optional GPSDO
  • Gigabit Ethernet connectivity

N210

  • Xilinx® Spartan® 3A-DSP 3400 FPGA
  • 14 bit 100 MS/s dual ADC
  • 16 bit 400 MS/s dual DAC
  • Frequency range: DC - 6 GHz with suitable daughterboard
  • Up to 50 MS/s in both directions
  • Full duplex, SISO (1 Tx & 1 Rx)
  • Fully-Coherent MIMO Capability
  • Optional GPSDO
  • Gigabit Ethernet connectivity

Compatible Daughterboards

  • SBX-40
  • UBX-40
  • WBX-40
  • CBX-40
  • LFRX / LFTX
  • BasicRX / BasicTX
  • TVRX2
  • DBSRX2

RF Specifications

RF Performance (with WBX)

  • SSB/LO Suppression -35/50 dBc
  • Phase Noise 1.8 GHz 10kHz -80 dBc/Hz
  • Phase Noise 1.8 GHz 100kHz -100 dBc/Hz
  • Phase Noise 1.8 GHz 1MHz -137 dBc/Hz
  • Power Output 15 dBm
  • IIP3 (@ typ NF) 0 dBm
  • Typical Noise Figure 5 dB

Clocks and Samples Rates

  • FIXME NEEL

Physical Specifications

Dimensions

22 x 16 x 5 cm

Environmental Specifications

Operating Temperature Range

  • N200/N210 0-40 °C

Schematics

N200/N210

N200/N210 Schematics

Datasheets

  • Dual Channel, 16-Bit DAC - AD9777
  • AD56x3
  • Clock Distribution IC - AD9510
  • Gigabit Ethernet Transceiver - ET1011C2

Mechanical Info

Weight

1.2 kg

Drawings

FPGA

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Interfaces and Connectivity

N200/N210

  • Gigabit Ethernet

Certifications

RoHS

As of December 1st, 2010 all Ettus Research products are RoHS compliant unless otherwise noted. More information can be found at http://ettus.com/legal/rohs-information

Downloads (FPGA images, E310 images, etc.)

FPGA Resources

UHD Stable Binaries

UHD Source Code on Github


Application Notes

FAQ