X410
Contents
- 1 [PAGE IS IN WORK]
- 2 Notice
- 3 Device Overview
- 4 Key Features
- 5 Hardware Specifications
- 6 Physical Specifications
- 7 Environmental Specifications
- 8 GPSDO
- 9 FPGA
- 10 Interfaces and Connectivity
- 11 Certifications
- 12 Certificate of Volatility
- 13 Downloads
- 14 Choosing a Host Interface
- 15 International Power Supply Options
- 16 Option: USRP X410 Rackmount
- 17 Guidance on SFP+ Adapters for Fiber Connectivity on NI Ettus USRP X410
- 18 Guidance on 10Gb SFP+ to RJ45 Adapters
- 19 Data Throughput Rates
[PAGE IS IN WORK]
Notice
When you receive a brand-new device, it is strongly recommended that you download the most recent filesystem image from the Ettus Research website and write it to the NI Ettus USRP X410. Instructions on downloading the latest filesystem image and writing it to the X410 is described in the (https://kb.ettus.com/USRP_X410_Getting_Started_Guide).
Note that if you are operating the device in Network Mode, then the versions of UHD running on the host computer and on the NI Ettus USRP X410 device must match.
Device Overview
The NI Ettus USRP X410 ...
Key Features
X410
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Hardware Specifications
X410
- Current Hardware Revision:
- Minimum version of UHD required:
Clocking and Sampling Rates
Physical Specifications
Dimensions
(L × W × H)
Weight
Drawings
CAD/STP Models
If you want any CAD / STP models beyond those found here, please send an email to Ettus Support at support@ettus.com noting your request and your use case for any such model. We will determine on a case-by-case basis whether we have any such requested model and, if so, whether to release it -- possibly requiring an NDA for any such release. Note that we do not have models on all USRPs and daughterboards, and requesting any model does not guarantee that either Ettus Research or NI will honor any such request.
X410
Environmental Specifications
Operating Temperature Range
Storage Temperature Range
Operating Humidity Range
GPSDO
- Support GPSDO NMEA Strings
Sensors
You can query the lock status with the gps_locked sensor, as well as obtain raw NMEA sentences using the gps_gprmc, and gps_gpgga sensors. Location information can be parsed out of the gps_gpgga sensor by using gpsd or another NMEA parser.
Specifications
| Module Specifications | |
|---|---|
| 1 PPS Timing Accuracy from GPS receiver | <8ns to UTC RMS (1-Sigma) GPS Locked |
| Holdover Stability (1 week with GPS) | <±50us over 3 Hour Period @+25°C (No Motion, No Airflow) |
| 1 PPS Output | 3.3VDC CMOS |
| Serial Port | TTL Level, GPS NMEA Output with 1Hz or 5Hz update rate, Integrated into UHD |
| GPS Frequency | L1, C/A 1574MHz |
| GPS Antenna | Active (3V compatible) or Passive (0dB to +30dB gain) |
| GPS Receiver | 65 Channels, QZSS, SBAS WAAS, EGNOS, MSAS capable
Supports Position and Hold over-determined clock mode |
| Sensitivity | Acquisition -148dBm, Tracking -165dBm |
| TTFF | Cold Start: <32 sec, Warm Start: 1 sec, Hot Start: 1 sec |
| ADEV | 10s: <7E-011
10Ks: <2E-012 (GPS Locked, 25°C, no motion, no airflow) |
| Warm Up Time / Stabilization Time | <10 min at +25C to 1E-09 Accuracy |
| Supply Voltage (Vdd) | 3.3V Single-Supply, +0.2V/-0.15V |
| Power Consumption | <0.16W |
| Operating Temperature | -10°C to +70°C |
| Storage Temperature | -45C to 85C |
| Oscillator Specifications (internal) | |||
|---|---|---|---|
| Frequency Output of low Phase Noise crystal | 20MHz CMOS 3Vpp | ||
| 20MHz Retrace | ±2E-08 After 1 Hour @ +25°C without GPS | ||
| RF Output Amplitude | 3Vpp CMOS | ||
| 20MHz Phase Jitter (100Hz to 10MHz) | <0.135ps rms | ||
| Frequency Stability Over Temperature (0°C to +60°C) | ±0.1ppm (internal TCXO without GPS) | ||
| Warm Up Time | < 1 min at +25C | ||
| Phase Noise at 20MHz | 1Hz | -65 dBc/Hz | |
| 10Hz | -97 dBc/Hz | ||
| 100Hz | -116 dBc/Hz | ||
| 1kHz | -136 dBc/Hz | ||
| 10kHz | <-148 dBc/Hz | ||
| 100 kHz | <-155 dBc/Hz | ||
Datasheet
- Spec Sheet: http://www.jackson-labs.com/assets/uploads/main/LTE-Lite_specsheet_20MHz.pdf
- User Manual: http://www.jackson-labs.com/assets/uploads/main/LTE-Lite.pdf
FPGA
FPGA User Modifications
The Verilog code for the FPGA in the NI Ettus USRP X410 is open-source, and users are free to modify and customize it for their needs. However, certain modifications may result in either bricking the device, or even in physical damage to the unit. Specifically, changing the I/O interface of the FPGA in any way, or modifying the pin and timing constraint files, could result in physical damage to other components on the motherboard, external to the FPGA, and doing this will void the warranty. Also, even if the PCIe interface is not being used, you cannot remove or reassign these pins in the constraint file. The constraint files should not be modified. Please note that modifications to the FPGA are made at the risk of the user, and may not be covered by the warranty of the device.
Interfaces and Connectivity
Front Panel
Rear Panel
Ref Clock - 10 MHz
Using an external 10 MHz reference clock, a square wave will offer the best phase noise performance, but a sinusoid is acceptable.
PPS - Pulse Per Second
Using a PPS signal for timestamp synchronization requires a square wave signal (a typical PPS signal has a 20%-25% duty cycle) with a 5Vpp amplitude.
To test the PPS input, you can use the following tool from the UHD examples:
-
<args>are device address arguments (optional if only one USRP device is on your machine)
cd <install-path>/lib/uhd/examples ./test_pps_input –args=<args>
Front Panel GPIO
Power on state
Pin Mapping
Note: Please see the X410 GPIO API for information on configuring and using the GPIO bus.
Power Connector
Pin Detail
Certifications
RoHS
As of December 1st, 2010 all Ettus Research products are RoHS compliant unless otherwise noted. More information can be found at http://ettus.com/legal/rohs-information
China RoHS
Management Methods for Controlling Pollution Caused by Electronic Information Products Regulation
Chinese Customers
National Instruments is in compliance with the Chinese policy on the Restriction of Hazardous Substances (RoHS) used in Electronic Information Products. For more information about the National Instruments China RoHS compliance, visit ni.com/environment/rohs_china.
Certificate of Volatility
Downloads
Choosing a Host Interface
10 Gigabit Ethernet
Recommended 10 Gigabit Ethernet Cards
- Intel X520-DA2
- Intel X520-DA1
- Intel X710-DA2
- Intel X710-DA4
- Mellanox MCX4121A-ACAT
International Power Supply Options
Option: USRP X410 Rackmount
Guidance on SFP+ Adapters for Fiber Connectivity on NI Ettus USRP X410
Ettus Research currently offers direct-connect, copper cabling accessories for the NI Ettus USRP X410. However, it is also possible to use multi-mode fiber instead of copper connections for these devices. In this section, we will provide general guidance on the types of fiber adapters and cables that can be used with these products.
The NI Ettus USRP X410 is compatible with most brands of SFP+ fiber adapters. In some cases, other equipment in the systems such as 1/10/100 Gigabit Ethernet switches are only compatible with specific brands of SFP+ adapters and cables. As a general rule, we recommend checking compatibility with the switches and network cards in your system before purchasing an adapter.
Ettus Research does test the NI Ettus USRP X410 devices with our TBD. Here are is a list of known-good cables and adapters.
Ettus Research has only tested multi-mode fiber accessories.
Known-Good Adapters
Known-Good Cables
Guidance on 10Gb SFP+ to RJ45 Adapters
Many new motherboards come equipped with an onboard 10Gb RJ45 NIC. It is possible to use a SFP+ to RJ45 adapter and operate at 10Gb speeds using a Cat6/7 Ethernet cables.
Ettus Research has tested the adapters linked below.
