E100/E110
Contents
End-of-Life (EOL)
Please note that this product is now End-of-Life (EOL), and is no longer available for sale through Ettus Research, and is not recommended for use in new designs or in new projects.
Key Features
USRP E100
- Designed for embedded applications (runs a full distribution of Linux)
- 720 MHz OMAP3 (ARM Cortex A8 processor & TI C64x+ DSP)
- 512MB RAM
- 4GB microSD Card
- 100 Mbit Ethernet connectivity
- Motherboard has one RTX daughterboard slot (1 RX + 1 TX connectors)
- Onboard FPGA processing
- FPGA: Xilinx Spartan XC3SD1800A
- ADCs: 12-bits 64 MS/s
- DACs: 14-bits 128 MS/s
- TCXO Frequency Reference (~2.5ppm)
- Flexible clocking from 10 MHz to 64 MHz
USRP E110
- Designed for embedded applications (runs a full distribution of Linux)
- 720 MHz OMAP3 (ARM Cortex A8 processor & TI C64x+ DSP)
- 512MB RAM
- 4GB microSD Card
- 100 Mbit Ethernet connectivity
- Motherboard has one RTX daughterboard slot (1 RX + 1 TX connectors)
- Onboard FPGA processing
- FPGA: Xilinx Spartan XC3SD3400A
- ADCs: 12-bits 64 MS/s
- DACs: 14-bits 128 MS/s
- TCXO Frequency Reference (~2.5ppm)
- Flexible clocking from 10 MHz to 64 MHz
Spec Sheet
- E100/E110 - File:Ettus Embedded Series.pdf
FPGA
- Utilization statistics are subject to change between UHD releases, current as of UHD 3.9.4
E100
Device utilization summary:
---------------------------
Selected Device : 3sd3400acs484-4
Number of Slices: 13361 out of 23872 55%
Number of Slice Flip Flops: 16121 out of 47744 33%
Number of 4 input LUTs: 23350 out of 47744 48%
Number used as logic: 20165
Number used as Shift registers: 3185
Number of IOs: 195
Number of bonded IOBs: 176 out of 309 56%
IOB Flip Flops: 103
Number of BRAMs: 74 out of 126 58%
Number of GCLKs: 2 out of 24 8%
Number of DSP48s: 28 out of 126 22%
FAQ
What is the default password for the USRP E100 series?
The default username and password for the USRP E100 and USRP E110 of the Embedded Series is:
- Username: root
- Password: usrpe
What are the available resources on the FPGA?
The available resources on the FPGA will vary depending on the code written for it. Based on the 27 March 2012 FPGA code build, the following resources are available:
USRP E110 (Xilinx Spartan 3A DSP - XC3SD3400A FPGA)
- General Logic:
- Flip Flops: 69% free
- LUTs: 78% free
- Memory: 50% free
- DSP Resources: 78% free
USRP E100 (Xilinx Spartan 3A-1400 FPGA)
- General Logic:
- Flip Flops: 29% free
- LUTs: 6% free
- Memory: 10% free
- DSP Resources: 13% free
Proper Care and Handling
All Ettus Research products are individually tested before shipment. The USRP E100/E110 is guaranteed to be functional at the time it is received by the customer. Improper use or handling of the USRP E100/E110 can easily cause the device to become non-functional. Listed below are some examples of actions which can prevent damage to the unit:
- Never allow metal objects to touch the circuit board while powered.
- Always properly terminate the transmit port with an antenna or 50Ω load.
- Always handle the board with proper anti-static methods.
- Never allow the board to directly or indirectly come into contact with any voltage spikes.
- Never allow any water, or condensing moisture, to come into contact with the boards.
- Always use caution with FPGA, firmware, or software modifications.
 |
Never apply more than -15 dBm of power into any RF input. |
|
Always use at least 30dB attenuation if operating in loopback configuration |
Technical Support and Community Knowledge Base
Technical support for USRP hardware is available through email only. If the product arrived in a nonfunctional state or you require technical assistance, please contact support@ettus.com. Please allow 24 to 48 hours for response by email, depending on holidays and weekends, although we are often able to reply more quickly than that.
We also recommend that you subscribe to the community mailing lists. The mailing lists have a responsive and knowledgeable community of hundreds of developers and technical users who are located around the world. When you join the community, you will be connected to this group of people who can help you learn about SDR and respond to your technical and specific questions. Often your question can be answered quickly on the mailing lists. Each mailing list also provides an archive of all past conversations and discussions going back many years. Your question or problem may have already been addressed before, and a relevant or helpful solution may already exist in the archive.
Discussions involving the USRP hardware and the UHD software itself are best addressed through the usrp-users mailing list at http://usrp-users.ettus.com.
Discussions involving the use of GNU Radio with USRP hardware and UHD software are best addressed through the discuss-gnuradio mailing list at https://lists.gnu.org/mailman/listinfo/discussgnuradio.
Discussions involving the use of OpenBTS® with USRP hardware and UHD software are best addressed through the openbts-discuss mailing list at https://lists.sourceforge.net/lists/listinfo/openbtsdiscuss.
The support page on our website is located at https://www.ettus.com/support. The Knowledge Base is located at https://kb.ettus.com.
Legal Considerations
Every country has laws governing the transmission and reception of radio signals. Users are solely responsible for insuring they use their USRP system in compliance with all applicable laws and regulations. Before attempting to transmit and/or receive on any frequency, we recommend that you determine what licenses may be required and what restrictions may apply.
Sales and Ordering Support
If you have any non-technical questions related to your order, then please contact us by email at orders@ettus.com, or by phone at +14086106399 (Monday-Friday, 8 AM - 5 PM, Pacific Time). Please be sure to include your order number and the serial number of your USRP.
Terms and Conditions of Sale
Terms and conditions of sale can be accessed online at the following link: http://www.ettus.com/legal/terms-and-conditions-of-sale
