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New England Workshop on Software Defined Radio (NEWSDR)



Tufts University - Medford, MA, USA


June 1-2, 2017



                            NEWSDR 2017

              New England Workshop on Software Defined Radio


                          Evening Workshops
                           Thursday June 1
                           17:30 to 21:00

                          Day-Long Symposium
                           Friday June 2
                           08:00 to 16:00

                          Tufts University
                          Medford, MA, USA


                         Free Pre-Registration

                 Poster Submissions and Pre-Registrations
                       Accepted Until Friday May 12

                     INVITATION TO PARTICIPATE

You are cordially invited to the 2017 New England Workshop on
Software Defined Radio (NEWSDR 2017), which is the seventh installment
of an annual series of symposium and workshop events organized by
the Boston SDR User Group (SDR-Boston).

This year, NEWSDR will be held at Tufts University, and consists of
a day-long symposium on Friday, as well as several hands-on technical
workshops the evening before on Thursday. You are welcome to attend
either or both events, which are entirely free when pre-registering.

Attendance is typically about 100 people, and attendees are evenly
split between academia and industry.

                         EVENING WORKSHOPS

                          THURSDAY JUNE 1
                           17:00 to 21:00

                          Tufts University
                       Medford, Massachusetts


16:00 – 17:30  Setup session for the Workshop Events (optional)

17:30 – 21:00  Workshop Events

Two hands-on technical workshops are being offered in parallel:

* "SDR Using USRP E310 and Simulink"
  by MathWorks

* "FPGA Programming on the USRP with the RFNoC Framework"
  by Ettus Research

MathWorks and Ettus Research will each run a workshop on the evening
before the main event. Workshops are technical, practical, hands-on
activities in a group setting. Specific topics and further details
about the workshops is listed below. Attendance is free, but
pre-registration is required. Free pizza and soda will be provided.

                         DAY-LONG SYMPOSIUM

                           FRIDAY JUNE 2
                           08:00 to 16:00

                        Breed Memorial Hall
                         Tufts University
                        51 Winthrop Street
                       Medford, Massachusetts


07:30 to 08:00  Coffee and Light Refreshments

08:00 to 08:15  Welcome and Introduction

08:15 to 09:40  Sponsor Overview Presentations (20 minutes each)

09:40 to 10:15  Elevator-Pitch Oral Presentations
                of Poster Presenters (2 minutes each)

10:15 to 10:45  Coffee, Attendee Networking, Poster Sessions,
                Sponsor Exhibits, and Demos

10:45 to 11:45  Industry Tutorial Presentation by MediaTek:
                "Prototyping Next Generation Wireless Devices"

11:45 to 13:00  Lunch and Attendee Networking

13:00 to 14:00  Keynote Presentation by Professor Dennis Roberson

14:00 to 14:30  Coffee, Attendee Networking, Poster Sessions,
                Sponsor Exhibits, and Demos

14:30 to 15:30  Industry Tutorial Presentation by Analog Devices:
                "ADALM-PLUTO SDR Prototyping with Matlab"

15:30 to 16:00  Closing Remarks, Best Poster Award, Announcements

Keynote Speaker:
  * Professor Dennis Roberson, Illinois Institute of Technology

Technical Poster Presentations:
  *  Covering the recent work in SDR and cognitive radio technology
  *  Poster presentations are now being solicited
  *  See link at the bottom of this email to submit your abstract

Corporate Sponsors:
  *  Analog Devices
  *  Ettus Research
  *  MathWorks
  *  MediaTek Wireless

The symposium features plenary speakers, technical poster
presentation sessions, hardware and software demonstrations from the
event sponsors, and workshops from the event sponsors, all focusing
on recent work in SDR and cognitive radio technology. Free breakfast,
lunch, and coffee will be provided. Attendance is free, but advance
registration is required.

The symposium provides an excellent networking opportunity and a
terrific venue to exchange thoughts and ideas with other people
working in the SDR space.

                       WORKSHOP DESCRIPTION

                   SDR with E310 using Simulink

This tutorial focuses on demonstrating modeling SDR-based designs in
MATLAB and Simulink, and configuring and deploying on the USRP E310.
Topics presented will include modeling communication systems using
Simulink, implementing radio I/O with E310 and Simulink, and
prototyping deployment with real-time data via HW/SW co-design.

Prior knowledge of programming Xilinx Zynq SoCs with MATLAB and
Simulink, and knowledge of communications systems and hardware design
are prerequisites.


Model Communication system using Simulink:
* Model and simulate RF signal chain and communication algorithms.
* Overview of Software Defined Radio concepts and workflows.
* Simulate a communication system that includes a transmitter,
  AD9361 transceiver, channel, and receiver (RF test environment).

Implement Radio I/O with E310 SDR and Simulink:
* Verify the operation of baseband transceiver algorithm using real
  data streamed from the AD9361 into MATLAB and Simulink.
* Overview of System objects and hardware platforms.
* Perform baseband processing in MATLAB and Simulink on received
* Verify algorithm performance for real data versus simulated data.

Hardware-Software Co-Design for Software:
* Split and deploy Tx/Rx algorithms to PL and PS.
* Overview of Zynq HW/SW co-design workflow.
* Implement transmitter and receiver on PL/PS using HW/SW co-design
* Download generated code to the ARM & FPGA, and tune system
  parameters in real-time operation via Simulink.

                       WORKSHOP DESCRIPTION

        FPGA Programming on the USRP with the RFNoC Framework
                           Ettus Research

Ettus Research's RFNoC (RF Network-on-Chip) software is meant
to decrease the development time for experienced FPGA engineers
seeking to integrate IP into the USRP signal processing chain.
RFNoC is the architecture for USRP devices that use Xilinx 7-series
FPGAs (E310, E312, X300, X310). RFNoC is built around a packetized
network infrastructure in the FPGA that handles the transport of
control and sample data between the host CPU and the radio. Users
target their custom algorithms to the FPGA in the form of
Computation Engines (CE), which are processing blocks that attach to
this network. CEs act as independent nodes on the network that can
receive and transmit data to any other node (e.g., another CE, the
radio block, or the host CPU). Users can create modular,
FPGA-accelerated SDR applications by chaining CEs into a flow graph.
RFNoC is supported in UHD and GNU Radio. In this workshop, we will
present an interactive hands-on tutorial on RFNoC, including a
discussion on its design and capabilities, demonstrations of several
existing examples, and a walk-through on implementing a user-defined
CE and integrating the CE into GNU Radio.


* Attendees are expected to bring their own laptops to the workshop.
The laptop should have a minimum of 4 GB memory, 60 GB of free disk
space, one Ethernet port available, and one USB 3.0 port available.

* Attendees are expected to install VirtualBox 5.1.18 or newer.

All necessary USRP hardware will be provided in the workshop.
Attendees do not need to bring any USRP hardware.


  *  Pre-register for the Symposium, or for the Workshop, or both

  *  Pre-registration is required, but is completely free

  *  Pre-registration takes less than 5 minutes

  *  Pre-registration includes free meals at the event

  *  Parking available

  *  You must pre-register online

  *  Attendance, meals, parking are all limited, so please
     pre-register online as soon as possible to secure your spot

  *  Pre-registration deadline is Friday May 12

  *  See link at the bottom of this announcement to pre-register online


                     Attendee Pre-registration:

                     Poster Abstract Submission:

                      ADDITIONAL INFORMATION

             More information, and the event schedule,
            for this event can be found at our website: