E100/E110

End-of-Life (EOL)

Please note that this product is now End-of-Life (EOL), and is no longer available for sale through Ettus Research, and is not recommended for use in new designs or in new projects.

Key Features

USRP E100

• Designed for embedded applications (runs a full distribution of Linux)
• 720 MHz OMAP3 (ARM Cortex A8 processor & TI C64x+ DSP)
• 512MB RAM
• 4GB microSD Card
• 100 Mbit Ethernet connectivity
• Motherboard has one RTX daughterboard slot (1 RX + 1 TX connectors)
• Onboard FPGA processing
• FPGA: Xilinx Spartan XC3SD1800A
• ADCs: 12-bits 64 MS/s
• DACs: 14-bits 128 MS/s
• TCXO Frequency Reference (~2.5ppm)
• Flexible clocking from 10 MHz to 64 MHz

USRP E110

• Designed for embedded applications (runs a full distribution of Linux)
• 720 MHz OMAP3 (ARM Cortex A8 processor & TI C64x+ DSP)
• 512MB RAM
• 4GB microSD Card
• 100 Mbit Ethernet connectivity
• Motherboard has one RTX daughterboard slot (1 RX + 1 TX connectors)
• Onboard FPGA processing
• FPGA: Xilinx Spartan XC3SD3400A
• ADCs: 12-bits 64 MS/s
• DACs: 14-bits 128 MS/s
• TCXO Frequency Reference (~2.5ppm)
• Flexible clocking from 10 MHz to 64 MHz

Spec Sheet

• E100/E110 - File:Ettus Embedded Series.pdf

FPGA

• Utilization statistics are subject to change between UHD releases, current as of UHD 3.9.4

E100

Device utilization summary:
---------------------------

Selected Device : 3sd3400acs484-4

 Number of Slices:                    13361  out of  23872    55%
 Number of Slice Flip Flops:          16121  out of  47744    33%
 Number of 4 input LUTs:              23350  out of  47744    48%
    Number used as logic:             20165
    Number used as Shift registers:    3185
 Number of IOs:                         195
 Number of bonded IOBs:                 176  out of    309    56%
    IOB Flip Flops:                     103
 Number of BRAMs:                        74  out of    126    58%
 Number of GCLKs:                         2  out of     24     8%
 Number of DSP48s:                       28  out of    126    22%

FAQ

What is the default password for the USRP E100 series?

The default username and password for the USRP E100 and USRP E110 of the Embedded Series is:

• Username: root
• Password: usrpe

What are the available resources on the FPGA?

The available resources on the FPGA will vary depending on the code written for it. Based on the 27 March 2012 FPGA code build, the following resources are available:

USRP E110 (Xilinx Spartan 3A DSP - XC3SD3400A FPGA)

• General Logic:
  • Flip Flops: 69% free
  • LUTs: 78% free
• Memory: 50% free
• DSP Resources: 78% free

USRP E100 (Xilinx Spartan 3A-1400 FPGA)

• General Logic:
  • Flip Flops: 29% free
  • LUTs: 6% free
• Memory: 10% free
• DSP Resources: 13% free

Proper Care and Handling

All Ettus Research products are individually tested before shipment. The USRP E100/E110 is guaranteed to be functional at the time it is received by the customer. Improper use or handling of the USRP E100/E110 can easily cause the device to become non-functional. Listed below are some examples of actions which can prevent damage to the unit:

• Never allow metal objects to touch the circuit board while powered.
• Always properly terminate the transmit port with an antenna or 50Ω load.
• Always handle the board with proper anti-static methods.
• Never allow the board to directly or indirectly come into contact with any voltage spikes.
• Never allow any water, or condensing moisture, to come into contact with the boards.
• Always use caution with FPGA, firmware, or software modifications.

	Never apply more than -15 dBm of power into any RF input.
	Always use at least 30dB attenuation if operating in loopback configuration